S Parameter Test Set

 
 

A full-featured VNA has a test set that allows you to fully analyze a device under test (DUT) without manually reversing its connections. This requires a high-quality RF switch. Another useful feature is a digitally-controlled RF attenuator so that you can set the drive levels differently for forward and reverse tests. Finally, a couple of bias tees are sometimes needed when the DUT requires DC bias. Here is how I built those devices for my VNA. (Note: this is a work in progress.)

S Parameter Test Set for the N2PK VNA

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RF Switch

For the RF switch I used Omron G6Z series surface-mount RF relays, available through Mouser. They have very high isolation and excellent return loss specs. It’s driven by a single output bit on the USB Interface board.

The reason for having a programmable attenuator in a VNA’s test set is to accommodate devices under test that have widely different forward and reverse gains, such as amplifiers. For this 0-70 dB step attenuator, I have a bunch of very nice Teledyne J412 DPDT TO-5 relays that have high isolation, low SWR, and are specified for use to 1 GHz. Thank heavens for Ebay, once again, where I found them for less than $10 each instead of the catalog price of $68. For attenuators, I’m using Minicircuits GAT-10 parts, which provide an accurate 10 dB in an SMT package. The final  board is 2x4 inches.


Since the N2PK VNA interface supplies 3 bits for attenuation setting, a decoder is required. No simple logic device will do the job, since the objective is to turn on N relays where N is 0...7.  A programmable logic device would do, or in my case I used a Z8 Encore microcontroller that I had laying around. By running its internal clock at 32 kHz, no RFI was detectable above -120 dBm.

Digital Step Attenuator

Even using microstrips and good relays, return loss was not as good as I wanted. Having high return loss generally improves VNA performance. Adding distributed capacitance and a series RC network did a pretty good job of tweaking the match up to 60 MHz. The cost was un-flat response, down about 2 dB at 60 MHz. After VNA calibration, this is of no consequence. I’m going to call this design irreproducible....

Wideband Bias Tee

To complete my test set, I designed a bias tee, which is useful when testing transistors or any other device that requires DC bias. See the Bias Tee page for more info.

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